n -channel enhancement mode power mosfet 08/06 /2007 rev.1.00 www.siliconstandard.com 1 SSM85T08GP product summary simple drive requirement low on-resistance fast switching characteristic description the advanced power mosfets from silicon standard corp. provide the designer with the best combination of fast switching, ruggedized device design, low on-resistance and cost-effectiveness. the to-263 package is universally preferred for all commercial- industrial surface mount applications and suited for low voltage applications such as dc/dc converters. the through-hole version (SSM85T08GP) are available for low-profile applications. absolute maximum ratings bv dss 80v r ds(on) 13m i d 75a g d s g d s to-263(s) g d s to-220(p) symbol units v ds v v gs v i d @t c =25 a i d @t c =100 a i dm a p d @t c =25 w w/ e as single pulse avalanche energy 3 mj i ar avalanche current a t stg t j symbol value units rthj-c thermal resistance junction-case max. 0.9 /w rthj-a thermal resistance junction-ambient max. 62 /w t hermal data parameter storage temperature range total power dissipation 138 -55 to 150 operating junction temperature range -55 to 150 linear derating factor 1.11 continuous drain current, v gs @ 10v 48 pulsed drain current 1 260 gate-source voltage 20 continuous drain current, v gs @ 10v 75 parameter rating drain-source voltage 80 450 30 pb-free; rohs-compliant
0 8/06 /2007 rev.1.00 www.siliconstandard.com 2 SSM85T08GP electrical characteristics @t j =25 o c (unless otherwise specified ) symbol parameter test conditions min. typ. max. units bv dss drain-source breakdown voltage v gs =0v, i d =1ma 80 - - v b v dss / t j breakdown voltage temperature coefficient reference to 25 , i d =1ma - 0.09 - v/ r ds(on) static drain-source on-resistance 2 v gs =10v, i d =45a - - 13 m v gs =4.5v, i d =25a - - 18 m v gs(th) gate threshold voltage v ds =v gs , i d =250ua 1 - 3 v g fs forward transconductance v ds =10v, i d =45a - 70 - s i dss drain-source leakage current (t j =25 o c) v ds =80v, v gs =0v - - 10 ua drain-source leakage current (t j =150 o c) v ds =64v ,v gs =0v - - 100 ua i gss gate-source leakage v gs = 20v - - 100 na q g total gate charge 2 i d =45a - 63 100 nc q gs gate-source charge v ds =64v - 23 - nc q gd gate-drain ("miller") charge v gs =4.5v - 38 - nc t d(on) turn-on delay time 2 v ds =40v - 30 - ns t r rise time i d =45a - 100 - ns t d(off) turn-off delay time r g =10 , v gs =10v - 144 - ns t f fall time r d =0.89 - 173 - ns c iss input capacitance v gs =0v - 6300 10080 pf c oss output capacitance v ds =25v - 670 - pf c rss reverse transfer capacitance f=1.0mhz - 350 - pf r g gate resistance f=1.0mhz - 1.1 1.7 source-drain diode symbol parameter test conditions min. typ. max. units v sd forward on voltage 2 i s =45a, v gs =0v - - 1.3 v t rr reverse recovery time 2 i s =20a, v gs =0v - 47 - ns q rr reverse recovery charge di/dt=100a/s - 86 - nc notes: 1.pulse width limited by safe operating area. 2.pulse width < 300us , duty cycle < 2%. 3.starting t j =25 o c , v dd =30v , l=1mh , r g =25 , i as =30a.
0 8/06 /2007 rev.1.00 www.siliconstandard.com 3 SSM85T08GP fig 1. typical output characteristics fig 2. typical output characteristics fig 3. on-resistance v.s. gate voltage fig 4. normalized on-resistance v.s. junction temperature fig 5. forward characteristic of fig 6. gate threshold voltage v.s. reverse diode junction temperature 0 50 100 150 200 250 036 9 1 2 v ds , drain-to-source voltage (v) i d , drain cu rre n t (a) t c =2 5 o c v g =3.0v 10v 7.0 v 5.0v 4.5v 0 30 60 90 120 03 69 1 2 v ds , drain-to-source voltage (v) i d , drain cu rre n t (a) t c = 150 o c v g =3.0v 10v 7.0 v 5.0v 4.5v 10 11 12 13 14 246 8 1 0 v gs gate-to-source voltage (v) r ds( on) (m ) i d =20a t c =25 o c 0.4 0.8 1.2 1.6 2.0 -50 0 50 100 150 t j , junction temperature ( o c) n o rmalize d r ds( on) i d =45a v g =10v 0 10 20 30 40 50 0 0.2 0.4 0.6 0.8 1 1.2 1.4 v sd , source-to-drain voltage (v) i s (a ) t j =25 o c t j =150 o c 0.0 0.5 1.0 1.5 2.0 -50 0 50 100 150 t j , junction temperature ( o c) n o rmalize d v gs( th) (v )
0 8/06 /2007 rev.1.00 www.siliconstandard.com 4 SSM85T08GP fig 7. gate charge characteristics fig 8. typical capacitance characteristics fig 9. maximum safe operating area fig 10. effective transient thermal impedance fig 11. transfer characteristics fig 12. gate charge waveform q v g 4.5v q gs q gd q g charge 100 1000 10000 1 5 9 1 31 72 1 2 52 9 v ds ,drain-to-source voltage (v) c (p f) f =1.0mhz c iss c oss c rss 0.01 0.1 1 0.00001 0.0001 0.001 0.01 0.1 1 t , pulse width (s) norm alize d th e rm al r e spon se ( r th jc ) p dm duty factor = t/t peak t j = p dm x r thjc + t c t t 0.02 0.01 0.05 0.1 0.2 duty factor=0.5 single pulse 1 10 100 1000 0.1 1 10 100 1000 v ds , drain-to-source voltage (v) i d (a) t c =25 o c s ingle pulse 100us 1ms 10ms 100ms dc 0 40 80 120 02 46 8 v gs , gate-to-source voltage (v) i d , drain current (a) t j =150 o c t j =25 o c v ds =5v 0 2 4 6 8 10 12 0 2 04 0 6 08 0 1 0 0 q g , total gate charge (nc) v gs , gate to s o u r c e v oltage ( v ) v ds = 40v v ds =5 0 v v ds =6 4 v i d =4 5 a
SSM85T08GP 0 8/06 /2007 rev.1.00 www.siliconstandard.com 5 information furnished by silicon standard corporation is believed to be accurate and reliable. however, silicon standard corporation makes no guarantee or warranty, expressed or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its use. silicon standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including without limitation enhancement in reliability, functionality or design. no license is granted, whether expressly or by implication, in relation to the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of silicon standard corporation or any third parties.
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